Method for reducing power consumed by a static microprocessor
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United States of America Patent
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-
Jul 19, 1988
Grant Date -
N/A
app pub date -
Aug 9, 1979
filing date -
Aug 9, 1979
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In response to a software instruction, a static microprocessor is placed in a low current mode by disabling clock pulse generation. Means are provided for disabling a master oscillator when a STOP instruction is decoded. Additional means are provided for inhibiting clock pulses when a WAIT instruction is decoded without disabling the master oscillator. Clock pulse generation is again enabled upon receipt of a reset or interrupt signal.
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