Complex arithmetic vector processor for performing control function, scalar operation, and set-up of vector signal processing instruction
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United States of America Patent
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Jul 26, 1988
Grant Date -
N/A
app pub date -
Jun 10, 1986
filing date -
Jun 10, 1986
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The processor is optimized for high-speed processing of large vectors, to fully utilize VHSIC technology, and to implement a signal processor having the highest possible throughput per volume while maintaining flexibility. It includes a 25 MHz embedded 1750A computer for performing control function scalar operations and set-up of vector signal processing instructions to be performed by a vector processing unit. The 40 MHz vector processing unit (VPU) performs high speed processing of real and complex vectors. The VPU's control portion provides an interface and status to the embedded 1750A computer. It also provides the control necessary for vector processing to occur concurrently with 1750A execution and concurrent with I/O of vector data.
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