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Abstract

Method and system for configuring a succession of complex frames to be used for exchanging synchronous circuit switched bits and asynchronous packet switched bits between nodes connected through medium links working at any bit rates in a teleprocessing network. Each complex frame contains an integer number of bits equal to Nc or Nc+1 chosen as close as possible to a predetermined number Na (256) and concludes a succession of subframes delimited by flags, in such a way that the period between two flags is equal to nT+e, T being the period of existing Time Divison Multiplex Frames (125 microseconds) and n being an integer number equal to or greater than 1 which depends upon the medium link bit rate and e being a period of time lower than a medium link bit period. The subframes have a duration equal to or less than T, each subframe containing an integer number of bits Nsi, said integer number being allocated to carry an integer number of circuit switched bit slots and the remaining bits being dedicated to asynchronous packet switched bits. The R bits remaining in the complex frame, with ##EQU1## are used for flag bits f and r=R-f bits are used for asynchronous packet switched bits.

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First Claim