Multiprocessor system formed by microprocessor matrix
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United States of America Patent
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Aug 9, 1988
Grant Date -
N/A
app pub date -
Dec 23, 1985
filing date -
Dec 26, 1984
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A multiprocessor system in which the base module comprises 32 microcomputer modules and provides a possibility for expansion. The interprocessor exchange is realized by a four-stage interconnection network with cyclic structure, which comprises 16 communication nodes. To each communication node there are connected two microcomputer modules and its structure comprises multiplexers, priority logics, input buffers, commutator elements, local controllers, demultiplexers, address registers and digital comparators. The self-synchronizing interconnection network provides spiral routes for eliminating any deadlock, as well as their reservation, which determines the high reliability and good possibilities for fault-tolerance.
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