High density electronic package comprising stacked sub-modules
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United States of America Patent
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-
Aug 16, 1988
Grant Date -
N/A
app pub date -
Jan 5, 1987
filing date -
Jan 5, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A high density electronic package is disclosed in which a stack of layer-like sub-modules have their edges secured to a stack-carrying substrate, the latter being in a plane perpendicular to the planes in which the sub-modules extend. Each sub-module has a cavity, inside which one or more IC chips are located. Each cavity-providing sub-module may be formed either by securing a rectangular frame to a chip-carrying substrate, or by etching a cavity in a single piece of material. In the latter case, the chips are mounted on the flat surface of one sub-module, and located inside the cavity of the next sub-module.
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