Importance

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Abstract

A system and method for implementing virtual memory in a computer system, wherein a table containing entries indicative of the correlation of virtual memory addresses to physical memory addresses is maintained in main memory, and translation descriptors, derived from the translation table entries, for a variable group of virtual addresses, is maintained in a high speed memory. Portions of a virtual address to be translated are compared to the translation descriptors in the high speed memory. If a matching translation descriptor is found, the corresponding physical address is determined by combining a portion of the virtual address with a portion of the matching translation descriptor. If a matching descriptor is not found, a software algorithm is employed to generate a translation descriptor for the virtual address from the table in main memory. The generated translation descriptor is then installed in the high speed memory, the comparison repeated, and the corresponding physical address generated.

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First Claim