Logic simulation system
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United States of America Patent
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-
Oct 4, 1988
Grant Date -
N/A
app pub date -
Oct 31, 1985
filing date -
Nov 2, 1984
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A simulation method and a computer therefor, i.e., a simulator, for simulating operation of a circuit employing logic gates. The simulation method is to be called the event drive method, in which the output processing is executed only when an input to cause output changes and the output level and the start and finish time for the level are sent out. Hence the number of packets of data flowing for simulation can be minimized and also the number of times of data processing is reduced. This system is applied to each component in a logic circuit, whereby the parallel execution of processing as to the parallel components is possible so as to devise the simulation at a higher speed.
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