Multichip integrated circuit packaging configuration and method

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United States of America Patent

PATENT NO 4783695
SERIAL NO

06912456

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Abstract

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A multichip integrated circuit package comprises a substrate to which is affixed one or more integrated circuit chips having interconnection pads. A polymer film overlying and bridging integrated circuit chips present is provided with a plurality of via openings to accommodate a layer of interconnection metallization which serves to connect various chips and chip pads within the interconnection pads disposed on the chips. A significant advantage of the packaging method and configuration of the present invention is the ability for the polymer film to be removed. This significantly improves testability and effectively provides wafer scale integration circuit packages which are free of problems associated with yield and testability.

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Patent Owner(s)

Patent OwnerAddress
LOCKHEED MARTIN CORPORATION6801 ROCKLEDGE DRIVE BETHESDA MD 20817

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Eichelberger, Charles W Schenectady, NY 110 7657
Wojnarowski, Robert J Ballston Lake, NY 93 7220

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