Interboard connection terminal and method of manufacturing the same

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United States of America Patent

PATENT NO 4783722
SERIAL NO

07023552

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Abstract

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A stack layer structure is formed wherein solderable metal layers are provided at least at two ends thereof, and at least a metal layer for preventing the diffusion of solder is inserted between the two metal layers. In an interboard connection terminal and a method of manufacturing the same, a pair of solder bumps are fixed to be in contact with the two surfaces of the resultant stack layer structure.

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Patent Owner(s)

Patent OwnerAddress
NIPPON TELEGRAPH AND TELEPHONE CORPORATION5-1 OTEMACHI 1-CHOME CHIYODA-KU TOKYO 1008116 ?1008116

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Egawa, Yutaka Tokyo, JP 12 296
Matsui, Norio Tokyo, JP 45 401
Osaki, Takaaki Tokyo, JP 4 112
Sasaki, Shinichi Iruma, JP 131 4656

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