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Abstract

Arithmetic Units in an SIMD processor are configurated so that status is computed based upon arithmetic conditions. This status could reflect conditions such as 'A greater than B', 'A equal to zero', or 'overflow'. The status implemented in a SIMD processor is dependent upon the specific application of the processor. values of 0 or 1, representing status conditions of true or false are typically latched in a status latch. One of the status latch bits can then be selected through a Multiplexer, (the selecting being done by an instruction from the control unit), and is called the selected condition. This selected condition is serially shifted into a Status Shift Register. The accumulated status bits from several data computations can be built up in the Status Shift Register, where the new selected condition bit is shifted in, and all the original bits in the Status Shift Register are shifted left one place. These accumulated status conditions can then be added to the common address provided to all the Arithmetic Units. This provides the capability to modify memory addresses within the Arithmetic Units based upon data computations, and allows data dependent algorithms to be performed within a SIMD processor without the loss in efficiency found in conditional activate/deactivate schemes, since the Arithmetic Units are always active.

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