Importance

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Abstract

An error-checking system in which two substantially identical modules are checked by comparing the outputs (43, 63) from the chip logic (41, 61) on each modules with each other. One module is designated a master and the other module is designated a checker. The compare logic (46 or 66) is functional only when the module that it is on is designated as the checker. A control bit designates a module as either a master or a checker. A second control bit indicates when in a first state, that a module designated as a master drives the bus, and when in a second state that a module designated as a master and a module designated as a checker alternately drive the bus. Circuitry distinguishes a warm initialization from a cold initialization. A bit in a register causes a module designated as a master to become a checker upon every alternate warm initialization, so that the module alternates between being a master and a checker only each time a warm initialization occurs.

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First Claim