Semiconductor memory having selectively activated blocks including CMOS sense amplifiers
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United States of America Patent
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-
Jan 3, 1989
Grant Date -
N/A
app pub date -
Nov 5, 1986
filing date -
Nov 5, 1985
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
It is contemplated to realize a semiconductor memory with a large memory capacity, high in integration and low in power dissipation. A semiconductor memory is disclosed, comprising a plurality of blocks each having a memory cell array and sense amplifier(s) to differentially amplify signals read out from the array, wherein a common driving line of amplifiers composed of N-channel MOS transistors among said sense amplifiers and a common driving line of amplifiers composed of P-channel MOS transistors among the sense amplifers are connected between different blocks.
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