Importance

Loading Importance Indicators...

Abstract

A binary data compression and exansion processing apparatus of this invention has an input data holding section for holding input code data. In an address section, bit data having a predetermined length is selected from code data held in the holding section in accordance with an instruction from an addition section, and address data for a decode section is generated from instruction data from a control section and the selected data. The decode section generates data associated with the run length in response to the generated address data, and outputs data indicating the length of the decoded code data portion. The addition section adds the data indicating the length to the previous instruction, and outputs sum data as the next instruction. When the sum data becomes equal to an input bit width, the control section outputs an instruction to the input data holding section so as to input the next code data. Therefore, the decoding processing apparatus of this invention can parallel-process input code data in a pipeline manner.

Loading the Abstract Image...

First Claim