Semiconductor memory system with dynamic random access memory cells

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United States of America Patent

PATENT NO 4800530
SERIAL NO

07085086

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Abstract

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A dynamic random access memory system comprises first and second memory banks. A plurality of memory cells connected to a word line are grouped into first and second groups. The first group is arranged in the first memory bank and the second group is arranged in the second memory bank. Read/write means is provided in which each n bits from and to the first group and each n bits from and to the second group are read and written alternatively. Each bit is read and written in synchronism with the toggles of a column address strobe signal.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA A CORP OF JAPAN72 HORIKAWA-CHO SAIWAI-KU KAWASAKI-SHI

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Horiguchi, Fumio Kawasaki, JP 34 1722
Itoh, Yasuo Kawasaki, JP 72 2559
Ogura, Mitsugi Yokohama, JP 23 522
Ohuchi, Kazunori Yokohama, JP 36 2267
Watanabe, Shigeyoshi Yokohama, JP 33 890

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