Error processing method and apparatus for information processing system

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United States of America Patent

PATENT NO 4800563
SERIAL NO

06893179

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Abstract

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In an information processing apparatus, when error of an instruction read out from an instruction storage area is detected, a correct instruction is created and rewritten in the instruction storage area. The rewritten instruction is read out for undergoing again error detection. When error is again detected, decision is made as to whether the error is a fixed one. In the case of the fixed error, a correct instruction is stored in an alternative storage area, while a remedy pattern capable of evading that fixed error is written in the instruction storage area at an address location where the fixed error is detected. The correct instruction corresponding to the remedy pattern is read out from the alternative storage area.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTD A CORP OF JAPAN6 KANDA SURUGADAI 4-CHOME CHIYODA-KU TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Itagaki, Teruo Hadano, JP 1 15
Noro, Teruo Hadano, JP 2 34

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