Semiconductor memory having multiple continuous access functions

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United States of America Patent

PATENT NO 4802135
SERIAL NO

06902564

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Abstract

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A pseudo static RAM is provided which uses a one MOSFET dynamic RAM cell, in which two functions of a page mode and a static column mode are realized by using an address buffer having a function to transmit address signals fed from external terminals as they are and a latch function to latch the address signals fed from the external terminals in synchronism with predetermined control signals fed from the external terminals. The address buffer also has a multiplexer function to selectively incorporate the address signals from the external terminals and the address signals produced in the inside of the RAM so that the address buffer and an internal address signal generating circuit may be controlled by external control terminals to make possible the continuous access by the internal address signals.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTD TOKYO 100 JAPANNot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ishihara, Masamichi Tokyo, JP 72 1690
Shinoda, Takashi Tokyo, JP 60 681

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