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Abstract

A vertical blanking interval standardizer circuit detects the vertical synchronization interval of a video signal and generates a vertical block sync pulse which replaces a serrated vertical sync signal in which the pulse spacing has been modified in a non-standard manner. An early control pulse existing from the beginning of the vertical blanking interval until the trailing edge of the vertical block sync pulse and a late control pulse existing from the trailing edge of the vertical block sync pulse until the end of the vertical blanking interval are generated. The early and late control pulses pre-bias an amplitude limiter transistor such that the transistor is reverse biased by signal components during the vertical blanking interval which exceed a selected blanking level. In this manner, pulses occurring during the vertical blanking interval which have a gray or a white level are blocked and replaced by the selected blanking level.

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First Claim