Method for making twin tub CMOS devices

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United States of America Patent

PATENT NO 4806501
SERIAL NO

07075718

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Abstract

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A method is disclosed for making twin tub devices with trench isolation. The trench mask is obtained in a self-aligned manner employing tub masks that define an overlapping region at the trench. In one embodiment, the N-tub mask is defined by patterning resist (4) and polysilicon (3) overlying silicon oxide (2). The P-tub mask is defined by patterning resist (9). The oxide at the overlapping region between the tubs is removed, resulting in trench mask (2', 2') for forming trench (15). In another embodiment, the N-tub mask is defined by patterning resist (23) and silicon nitride (22). The P-tub mask is then defined by patterning resist (27) and nitride (22'). Self-aligned oxide regions (31) formed around nitride (22')serve as a trench mask for forming trench (32).

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Patent Owner(s)

Patent OwnerAddress
BLACK & DECKER INC1000 STANLEY DRIVE NEW BRITAIN CT 06053

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baldi, Livio Agrate Brianza, IT 40 483
Cappelletti, Paolo G Seveso, IT 8 115

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