High speed synchronous/asynchronous local bus and data transfer method
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United States of America Patent
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-
Feb 21, 1989
Issued Date -
N/A
app pub date -
Jan 14, 1987
filing date -
Nov 25, 1983
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A high speed local synchronous bus is disclosed for coupling processors within a multi-processor system such that local memory and secondary processing resources may be accessed without impacting data traffic along the bus. The local bus employs a message control method and apparatus which includes the ability to assert a WAIT signal when the processing resource is replying to a request. By asserting the WAIT signal all other operations on the bus are delayed until the transfer is complete. The use of the WAIT signal enables a device operating at a different speed from the primary processing resource to respond across the bus in a manner that is synchronized to the clock speed of the primary processing resource.
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