Polycide process for integrated circuits
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United States of America Patent
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Mar 28, 1989
Issued Date -
N/A
app pub date -
Apr 6, 1987
filing date -
Nov 19, 1981
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A process for making a semiconductor integrated circuit which has electrodes, contacts and interconnects composed of a multilayer structure including a layer of polycrystalline silicon with an overlying layer of a refractory metal silicide such as MoSi.sub.2 or WSi.sub.2. Adhesion of the metal silicide to the polysilicon is enhanced by forming a thin silicon oxide coating on the polysilicon before sputtering the metal silicide. The resulting structure has low resistance but retains the advantages of polysilicon on silicon.
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