Fault-tolerant multiprocessor system
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United States of America Patent
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Mar 28, 1989
Issued Date -
N/A
app pub date -
May 19, 1987
filing date -
Sep 7, 1976
priority date (Note) -
Expired
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Abstract
In a multiprocessor system interconnected by a bus structure that provides communication and information transfers between the processor modules of the system, each processor broadcasts a central message to all the other processors of the system on a periodic basis. A processor module not receiving the control message from a sending processor module will assume the sending processor module has failed, and operate to take over the task of the failed processor module.
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