Method of making a hybrid semiconductor device

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United States of America Patent

PATENT NO 4818728
SERIAL NO

07128437

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Abstract

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A method for making a semiconductor device of a type comprising at least first and second semiconductor circuit units, which method comprises the step of forming a plurality of connecting electrodes on an upper surface of each of at least first and second semiconductor substrates; forming an electrically insulating layer entirely over the upper surface of each of the first and second substrates so as to cover the respective connecting electrodes; partially removing the insulating layer on each of the first and second substrates to permit the respective electrodes to be exposed to the outside; forming metal studs on the first substrate in contact with the electrodes so as to protrude outwardly of the respective insulating layer to complete the first semiconductor unit and forming solder deposits on the second substrate in contact with the respective electrodes on such second substrate to complete the second semiconductor unit; combining the first and second semiconductor units with the metal studs in the first semiconductor unit aligned respectively with the solder deposits in the second semiconductor unit; and heating the resultant assembly to allow the solder deposits to be melted with the associated metal studs consequently immersed into the melted solder deposits thereby to accomplish a firm interlock between the electrodes on the first and second substrates.

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Patent Owner(s)

Patent OwnerAddress
SHARP KABUSHI KAISHA 22-22 NAGAIKE-CHO ABENO-KU OSAKA-SHI OSAKA-FU JAPANNot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nukii, Takashi Nara, JP 11 601
Rai, Akiteru Osaka, JP 7 530
Yamamura, Keiji Nara, JP 7 485

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