Saturable carry-save adder

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United States of America Patent

PATENT NO 4819198
SERIAL NO

06883657

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Abstract

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A carry-save adder for a bit-parallel addition of binary numbers in two's complement form incorporates a series of first adders for forming intermediate sum and carry words which are combined in an adder means to form a sum word. A decoder is provided for recognizing saturation of the carry-save adder and for generating overflow signals in dependence on the two most significant bits of the intermediate sum and carry words. When the overflow signals are generated, the recursive circuit branches are disconnected and saturation intermediate sum and carry words are substituted for the intermediate sum and carry words which yield sum words which do not exceed the permissible adder content.

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Patent Owner(s)

Patent OwnerAddress
SIEMENS AKTIENGESELLSCHAFT A GERMAN CORPBERLIN AND MUNCHEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Noll, Tobias Neckartailfingen, DE 27 156
Ulbrich, Walter Puchheim, DE 4 27

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