Dual port video memory system having a bit-serial address input port
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United States of America Patent
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-
Apr 11, 1989
Grant Date -
N/A
app pub date -
Jan 30, 1987
filing date -
Jan 30, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A dual port digital memory system, which includes integral memory sequencing circuitry, is controlled by a bit-serial address and control signal. The address and control signal, which includes a data read address, a data write address and a control value, is serially loaded into a shift register. The address sequencing circuitry loads the read and write address values into integral read and write address registers and, based on the control value, initiates respective read and/or write operations.
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