Method of fabricating large area semiconductor arrays

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United States of America Patent

PATENT NO 4822755
SERIAL NO

07185600

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Abstract

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A method for separating chips formed on a silicon substrate is provided which uses a combination of reactive ion etching techniques combined with orientation etching to yield integrated chips having edges which can be more precisely butted together to form large area arrays.

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Patent Owner(s)

Patent OwnerAddress
XEROX CORPORATION201 MERRITT 7 P O BOX 4505 NORWALK CT 06851-1056

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Campanelli, Michael R Webster, NY 40 1444
Drake, Donald J Rochester, NY 66 3706
Hawkins, William G Webster, NY 63 3453

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