Importance

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Abstract

A computer-aided automatic wiring method is disclosed, which determines a wiring pattern for a semiconductor IC device in which function blocks are arranged on a substrate and channel are defined around the blocks to serve as wiring regions. First, electrical connecting paths between associated blocks at one channel (a first channel) are determined to obtain a normal wiring pattern in accordance with a bonding request. Subsequently, if another channel (a second channel) already subjected to normal wiring is present among channels adjacent to the first channel, these channels are merged before the next channel is subjected to normal wiring so as to define a new expanded channel (a third channel). A combined wiring pattern of the third channel, obtained simply by combining wiring patterns of the first and second channels, is then modified conform to the shortest routing rule. If a vacant space is found in the modified wiring pattern, the space is removed to reduce the size of the third channel. The processing is repeatedly executed with respect to every channel, thereby optimizing the entire wiring pattern of the IC device to maximize its packing density.

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First Claim