Apparatus and method for minimizing the let-through voltage associated with circuits used in conjunction with electronic elements to suppress surges, transients and like electrical disturbances
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United States of America Patent
Stats
-
May 30, 1989
Grant Date -
N/A
app pub date -
Oct 16, 1987
filing date -
Oct 16, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A surge protection circuit is adapted to have a minimum let-through voltage when a power surge is applied thereto. The circuit includes line conductors connecting a power source to an electrical load being protected and clamping elements connected to those line conductors and across the electrical load. The clamping elements each have terminals at each end thereof and these clamping element terminals are connected directly to the line conductors whereby an essentially impedance-free path is established between the line conductors and the clamping element. When the clamping element is activated, the let-through voltage is essentially equal to the clamping voltage of the clamping element and is not increased by a voltage drop generated by an impedance associated with any leads connecting the clamping element to the line conductors. A method is also disclosed, and the power source and the load can be single or multi-phase.
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