Emitter-coupled logic circuit with three-state capability
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United States of America Patent
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-
Jul 18, 1989
Grant Date -
N/A
app pub date -
Dec 15, 1987
filing date -
Dec 15, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An ECL circuit (30.sub.1) formed with a pair of emmitter-coupled bipolar transistors (Q1.sub.A and Q1.sub.B), a main current source (26), a resistor (R1.sub.A), and an output transistor (Q2) contains a switching stage (38) for placing the circuit in the three-state mode when the circuit is operated in the normal ECL output voltage range. The switching stage causes current exceeding that supplied by the current source to flow through the resistor. The output transistor turns off, enabling the circuit to exhibit high output impedance.
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