Computer address modification system with optional DMA paging
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United States of America Patent
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Jul 18, 1989
Issued Date -
N/A
app pub date -
Aug 10, 1987
filing date -
Mar 3, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A computer system includes a computer address modification system that is advantageously coupled in a bus network to selectively translate memory address data in 16K blocks and provide DMA page addresses in 16K blocks which may match the 16K memory address blocks. The modification system includes a mapping RAM selectively providing translated addresses to enable addresses in a 16 megabyte extended address space. The modification system also includes a page register storing for each addressable 16K block of data for each DMA channel a page address within the extended address space.
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