Automatic circuit layout router
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United States of America Patent
Stats
-
Jul 25, 1989
Grant Date -
N/A
app pub date -
Jun 24, 1987
filing date -
Jun 24, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method for operating a digital computer to globally route interconnects between terminals of a gate array. A first terminal closest to an average position of terminals to be interconnected is identified. A second terminal closest to the first terminal is then identified, and a first path between the first and second terminals is established along possible paths. An edge of the first path is set as a routing path if predetermined conditions are met. A closest remaining terminal to an established path is next identified, and a shortest path between the closest terminal and the established path to which it was closest is established. Edges of the shortest path and/or the established path to which it was closest are set as routing paths, if predetermined conditions are met. The above steps are then repeated for remaining terminals to be interconnected. Any possible paths within established paths with no set edges can then be set as routing paths.
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