Buffered routing element for a user programmable logic device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 4855619
SERIAL NO

07121963

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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A programmable interconnect for programmably connecting transmission lines which are part of a configurable logic array is combined with a buffer at locations within the logic array where a signal will travel from a low capacitance line to a higher capacitance line. Use of a buffer in this arrangement allows for programmable interconnects controlling the configuration of the logic array to be smaller; consuming less power and providing for faster rise and fall of an output signal even when propagating through a long series of programmable interconnects. Several arrangements for programmably controlling the interconnect are taught. Also taught is a means of achieving a very wide AND gate without the need for cascading smaller devices.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
XILINX, INC.SAN JOSE, CA3614

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Carter, William S Santa Clara, CA 20 1713
Hsieh, Hung-Cheng Sunnyvale, CA 15 1094

Cited Art Landscape

Patent Info (Count) # Cites Year
 
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* Cited By Examiner

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (1)
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MORGAN STANLEY & CO. LLC (1)
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* Cited By Examiner