Importance

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Abstract

A TTL compatible buffer circuit responsive to an input signal and having a controlled ramp output is disclosed and includes a low and a high output voltage driver, each driver being comprised of a Darlington pair of transistors, and each driver being separately controlled by its own control circuit. Each control circuit includes at least a capacitor and resistor which are arranged to control the voltage at the base of the upper transistor of the Darlington pair output voltage driver. In this manner, the voltage at the high voltage driver increases in a substantially linear manner when the input signal goes from low to high, and the voltage at the low voltage driver decreases in a substantially linear manner when the input signal goes from high to low. The turn on time of the drivers is thus relatively long. Each control circuit further includes a transistor which permits the respective output voltage driver to turn off quickly. With a quick turn off and a long turn on, a break before make condition is established and voltage supply line bounce due to a feedthrough circuit is eliminated. Voltage supply line bounce due to current flow between the load capacitance at the buffer circuit output and a low voltage source through the low voltage driver upon the turning on of the low voltage driver is also substantially reduced.

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First Claim