
US Patent No: 4,856,032
Number of patents in Portfolio can not be more than 2000
High speed programmable frequency divider and PLL
Stats
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Aug 8, 1989
Issued date -
Jan 12, 1987
filing date -
07/002,474
serial no -
Expired
status
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Abstract
A phase locked loop including a programmable frequency divider with a variable modulus divider (VMD) having two modes of operation, n and n+1, a programmable counter for counting the number of times the VMD divides the input signal and a comparator for comparing the count in the counter to a predetermined number and switching the VMD from the first mode to the second mode when the instant count and predetermined number are equal. The programmable counter provides an output pulse each time the total count equals a selected number. The VMD is a GaAs semiconductor device.
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First Claim
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International Classification(s)
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Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 4,241,408 High resolution fractional divider | 15 | 1979 | |
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| 4,633,194 Digital frequency divider suitable for a frequency synthesizer | 24 | 1981 | |
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| 4,518,920 Frequency synthesizer and method | 5 | 1982 | |
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| 4,606,059 Variable frequency divider | 22 | 1984 | |