Multiplexed bus architecture for configuration sensing
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United States of America Patent
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-
Sep 12, 1989
Grant Date -
N/A
app pub date -
Jul 18, 1988
filing date -
Jul 18, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The invention provides a circuit for use with a standard bidirectional databus having an active current device providing a first logic level in combination with a selectably jumpered passive resistance device providing a second logic level, the active element responsive to an enable signal whereby tristating the bus write drivers and reading the bus will sense a configuration determined by selection of the jumper.
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