Method and apparatus for effectively doubling the operational speed of selected digital circuits
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United States of America Patent
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Oct 10, 1989
Grant Date -
N/A
app pub date -
May 9, 1988
filing date -
May 9, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and apparatus for effectively doubling the operational speed of certain digital circuit designs. In particular, a digital clock operating at a first frequency is utilized to effectively drive TTL shift registers at twice the frequency of the digital clock. This effective doubling of the clock speed is achieved without the necessity of resorting to expensive and high power consumption circuit designs.
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