Semiconductor memory with an improved nibble mode arrangement
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United States of America Patent
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-
Oct 17, 1989
Issued Date -
N/A
app pub date -
Nov 30, 1987
filing date -
Dec 23, 1983
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A dynamic semiconductor memory includes a shift register which enables a nibble operation to be carried out, and a timing generator. The timing generator detects every transient state of the column address strobe signals to form shift pulses that are to be supplied to said shift register, as well as timing signals that are to be supplied to various internal circuits. The dynamic semiconductor memory having such a timing generator operates at high speeds, since it is accessed by the cycle number with a small change of the column address strobe signals.
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