Method for fabricating an isolation region in a semiconductor substrate

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United States of America Patent

PATENT NO 4876214
SERIAL NO

07201491

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An isolation region is fabricated in a silicon substrate by first forming a silicon dioxide insulating layer on the substrate. A silicon nitride mask layer and an oxide layer are then deposited on the insulating layer. The oxide, mask and insulating layers and the substrate are etched to form a trench in the substrate. A channel stopper is implanted in substrate below the trench and the oxide layer is then stripped. Thereafter, the trench surface is oxidized to extend the insulating layer into the trench. Next, the trench is partially filled with polysilicon material, the surface of which is initially oxidized to extend the insulating layer over the trench. The mask layer is etched back to expose portions of the insulating layer adjacent the trench. The upper surface of the polysilicon material in the trench and portions of the substrate beneath exposed portions of the insulating layer are further oxidized to thicken the insulating layer over the trench.

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Patent Owner(s)

  • MAXIM INTEGRATED PRODUCTS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lane, Eric Portland, OR 6 216
Patton, Evan Portland, OR 9 494
Yamaguchi, Tadanori Hillsboro, OR 12 303
Yu, Simon Beaverton, OR 31 601

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