Method of forming silicides having different thicknesses
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United States of America Patent
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Oct 31, 1989
Grant Date -
N/A
app pub date -
May 31, 1988
filing date -
May 31, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A MOS transistor (10) having a thicker silicide layer (50) over a gate (30) than a silicide layer (44) over source and drain regions (42) is disclosed. A process of the present invention forms a first silicide barrier (28) overlying the gate (30) when the gate is formed. Next, a first silicide formation process forms the first silicide layer (44) overlying source and drain regions (42). The silicide barrier layer (28) prevents silicide formation over the gate (30). The silicide barrier (28) is removed, and another silicide barrier (48) is formed over the first silicide layer (44). A second silicide formation process forms the second silicide layer (50) over the gate (30). The silicide barrier layer (48) prevents expansion of the first silicide layer (44).
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