Importance

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Abstract

A non-volatile memory has a sense amplifier having a select side and a reference side which compares the current drawn by a selected bit line to the current drawn by a reference bit line. There is a column decoder which selects the bit line and couples it to the select side of the sense amplifier. The column decoder adds capacitance so that the capacitance is greater on the select side of the sense amplifier than on the reference side. The natural result of the capacitance imbalance was slowing of the speed with which the sense amplifier could provide reliable sensing. There is provided circuitry for compensating for this capacitance imbalance.

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First Claim