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Abstract

A circuit arrangement for summing power outputs is disclosed. The circuit arrangement is especially useful in connection with a multi-phase electricity meter. The arrangement includes a plurality of input circuits connected in sequence, each of which has a current-to-voltage converter and a multiplier connected to the current-to-voltage converter. A voltage-to-frequency converter is connected at the output of each multiplier. Starting, at least with the second input circuit in the sequence, an adder is connected to the voltage-to-frequency converter by means of two inputs of the adder. Two other inputs of the adder are connected to two outputs of the preceding input circuit in the sequence. Illustratively, two outputs of each adder form two outputs of the corresponding input circuit. A ternary encoder followed by a ternary decoder may be located between the outputs of one input circuit and the adder of the succeeding input circuit. The two outputs of the adder in the last input circuit in the sequence are connected to the inputs of a forwards/backwards counter. Each of the two outputs of the forwards/backwards counter is connected to a mechanism such as a stepping motor which activates a display.

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First Claim