Instruction prefetch control apparatus

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United States of America Patent

PATENT NO 4881170
SERIAL NO

07117152

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Abstract

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An information processing system for performing a prior control in determining a branch destination address by an execution of a branch instruction, includes a branch history table for storing prior branch destination address due to the fact that the possibility of branching to the prior branch destination address is high. By storing, in the branch history table, the branch destination address together with residual instruction number from the branch destination address to segment boundary, it is possible to restrict an instruction prefetch beyond the boundary area of a main memory to thereby prevent an excessive request from being produced. By storing, in the branch history table, the branch destination address together with mode information, it is possible to prevent an access to the main memory in a different mode from that at an instruction prefetch from occurring.

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Patent Owner(s)

  • NEC CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Morisada, Tsuyoshi Tokyo, JP 4 66

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