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Abstract

A new permutation bit map architecture is described for flexible cellular addressing, image creation, and frame buffer control in raster graphics machines. A new frame buffer address generator and address circuitry accesses frame buffer memory locations with different word and cell configuration addressing modes to increase performance and efficiency. A new graphics image data generator creates, modifies, and updates graphics image data in the frame buffer memory locations accessed by the multiple addressing mode word and cell configurations of the address generator and address circuitry. The graphics image data generator provides vector drawing, polygon filling, 'Bit Blt's' or bit block transfers, alignment and masking of graphics image data, and refresh display of a raster view surface. Vector drawing is achieved with greatly increased performance because of the multiple cellular addressing modes of the addressing circuitry. A new and unusual permuted bit map organization of graphics image data is established in the frame buffer memory locations by the new flexible addressing architecture. The frame buffer address circuitry incorporates linear permutation networks that permute the user X,Y,Z coordinate addresses. The data generator circuit also incorporates linear permutation networks for normalizing, aligning and merging data retrieved from the frame buffer memory in raster operations. Parallel processing of accessed data is achieved using a frame buffer comprised of multiple memory banks. The system is also implemented in three dimensions. A new three-dimensional permuted bit map organization accommodates a variable number of multiple planes in the third dimension or bit depth dimension for varying the number of bits defining each pixel.

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First Claim