ECL to CMOS converter
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United States of America Patent
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Dec 19, 1989
Grant Date -
N/A
app pub date -
Oct 19, 1988
filing date -
Oct 19, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The subject invention is an ECL to CMOS converter for converting high or low ECL logic signals. The converter comprises a CMOS inverter for providing low or high CMOS logic signals at its output in response to a first or second signal, respectively, applied to its input. The first signal must exceed a first predetermined value and the second signal must fall below a second predetermined value. The first and second predetermined values are such that either the low ECL signal does not fall below the second predetermined value or the high ECL signal does not exceed the first predetermined value. The converter also provides means for converting the high and low logic signals to the first and second signals, respectively.
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