Peripheral controller with paged data buffer management
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United States of America Patent
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-
Dec 19, 1989
Grant Date -
N/A
app pub date -
Jan 10, 1989
filing date -
Jan 10, 1989
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A controller controls data transfers between a data processing system bus and peripheral devices. In the controller, data buffers are divided into page frames. Paging circuitry provides for allocation and deallocation of pages to and from the data buffer. Included in the page circuitry is a paging RAM. The paging RAM and other paging circuitry components allow contiguously addressed pages of data to be stored in noncontiguous locations in the data buffer. There may be more than one data buffer and these data buffers may be exclusively seized by microprocessors in the controller via seizing logic.
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