Algebraic coder-decoder for Reed Solomon and BCH block codes, applicable to telecommunications
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United States of America Patent
Stats
-
Dec 19, 1989
Grant Date -
N/A
app pub date -
Oct 27, 1987
filing date -
Oct 27, 1986
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An algebraic coder-decoder for Reed Solomon and BCH block codes is provided, namely a coprocessor of standard microprocessors specialized for algebraic processing in Galois bodies. This processor includes a clock generator which sets the rhythm of the circuit through a cycle clock and a subcycle clock, a control circuit which integrates an automatic loop system and a cycle stealing device, an arithmetic operator for carrying out simple operations on unsigned numbers representing the variables and the parameters of the algorithms a Galois operator for effecting the elementary polynomial operations in the five Galois bodies and storing the data exchanged with the host processor, an interface circuit which integrates a data exchange managament automation, a data bus, an instruction and the connections required for the control signals which connect the four blocks of the device together.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| THOMSON-CSF | PARIS FRA PARIS PARIS |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Brechard, Dominique | Paris, FR | 3 | 106 |
| Laurent, Pierre-Andre | Bessancourt, FR | 11 | 153 |
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