Apparatus for substantially syncronizing the timing subsystems of the physical modules of a local area network

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United States of America Patent

PATENT NO 4890222
SERIAL NO

07065974

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A local area network has a plurality of modules, each module having a corresponding timing subsystem. Each timing subsystem includes a clock unit for generating clock pulses, and an a.c. power source. Each timing subsystem is capable of having the timing information generated by each timing subsystem substantially synchronized to the timing information generated by a timing subsystem designated as a master timing subsystem. Each timing subsystem includes a first element, adapted to receive clock pulses and an a.c. reference signal generated from an a.c. power source, which generates timing information from the clock pulses or the a.c. reference signal in response to commands from the module. A register element stores the timing information generated. A second element updates the timing information stored in the register element with timing information included in a timing frame in response to a predetermined command from the module. The timing frame is periodically transmitted by the timing subsystem designated as the master timing subsystem, to each timing subsystem of each module. The timing frame includes timing information generated by the master timing subsystem, thereby resulting in having the timing information of each timing subsystem of each module substantially the same as the timing information of the master timing subsystem.

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Patent Owner(s)

  • HONEYWELL INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kirk, David L Phoenix, AZ 7 169

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