Modulo arithmetic processor chip
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United States of America Patent
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Jan 2, 1990
Issued Date -
N/A
app pub date -
Dec 22, 1988
filing date -
Mar 4, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention provides for a processor chip for computing addition, multiplication, and exponentiation in a Galois Field of integers modulo a prime number p, GF(p). The invention includes twelve registers for storing n-bit integers, a full adder for shifting left and adding data stored in two of the registers. A feedback register is included for storing a n-bit number and means for generating a feedback number is provided, wherein the feedback number is generated from a prime number, p. Also included are modulo means for reducing data bits stored in the registers modulo a prime number p.
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