Low voltage and low power frequency synthesizer

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 4893087
SERIAL NO

07141380

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A low power and low voltage frequency synthesizer includes a memory containing information to provide divisor information to the variable divider of a phase locked loop and information to select predetermined values of capacitance to connect to the frequency determining resonant network of the VCO to provide a coarse tuning. This tuning is then further modified by the normal operation of the phase locked loop.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
MOTOROLA, INC.SCHAUMBURG, IL509

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Davis, Walter L Coral Springs, FL 74 2827

Cited Art Landscape

Patent Info (Count) # Cites Year
 
THORN EMI ELECTRONICS LIMITED (1)
* 4453136 AFC System for controlling an oscillator according to an input frequency 12 1981
 
XEROX CORPORATION (1)
* 4635000 Temporal pixel clock synchronization system 24 1985
 
KABUSHIKI KAISHA TOSHIBA (1)
* 4613826 Frequency synthesizer for CATV tuner 7 1985
 
MOTOROLA, INC. (2)
* 4330758 Synchronized frequency synthesizer with high speed lock 26 1980
* 4631496 Battery saving system for a frequency synthesizer 48 1985
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
SHARP KABUSHIKI KAISHA (1)
* 5111151 Digital phase locked loop system 14 1989
 
MICRON TECHNOLOGY, INC. (1)
7137024 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding 0 2003
 
QORVO US, INC. (1)
6724265 Compensation for oscillator tuning gain variations in frequency synthesizers 56 2002
 
YOKOGAWA ELECTRIC CORPORATION (1)
* 5719514 Delay circuit compensating for variations in delay time 25 1996
 
SILICON LABORATORIES INC. (30)
* 6327463 Method and apparatus for generating a variable capacitance for synthesizing high-frequency signals for wireless communications 51 1998
* 6311050 Single integrated circuit phase locked loop for synthesizing high-frequency signals for wireless communications and method for operating same 21 1998
6308055 Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications 32 1998
6304146 Method and apparatus for synthesizing dual band high-frequency signals for wireless communications 22 1998
* 6226506 Method and apparatus for eliminating floating voltage nodes within a discreetly variable capacitance used for synthesizing high-frequency signals for wireless communications 24 1998
* 6167245 Method and apparatus for operating a PLL with a phase detector/sample hold circuit for synthesizing high-frequency signals for wireless communications 74 1998
* 6150891 PLL synthesizer having phase shifted control signals 60 1998
* 6147567 Method and apparatus for providing analog and digitally controlled capacitances for synthesizing high-frequency signals for wireless communications 61 1998
* 6137372 Method and apparatus for providing coarse and fine tuning control for synthesizing high-frequency signals for wireless communications 110 1998
6323735 Method and apparatus for synthesizing high-frequency signals utilizing on-package oscillator circuit inductors 81 2000
6388536 Method and apparatus for providing coarse and fine tuning control for synthesizing high-frequency signals for wireless communications 22 2000
6317006 Frequency synthesizer utilizing phase shifted control signals 18 2000
6549764 Method and apparatus for selecting capacitance amounts to vary the output frequency of a controlled oscillator 12 2001
6549765 Phase locked loop circuitry for synthesizing high-frequency signals and associated method 19 2001
6483390 Method and apparatus for synthesizing dual band high-frequency signals for wireless communications 12 2001
6760575 Method and apparatus for generating a variable capacitance for synthesizing high-frequency signals for wireless communications 20 2001
7092675 Apparatus and methods for generating radio frequencies in communication circuitry using multiple control signals 70 2002
6993314 Apparatus for generating multiple radio frequencies in communication circuitry and associated methods 18 2002
* 2002/0187,763 Apparatus and methods for generating radio frequencies in communication circuitry 2 2002
* 6965761 Controlled oscillator circuitry for synthesizing high-frequency signals and associated method 4 2003
* 2003/0119,467 Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications 2 2003
7242912 Partitioning of radio-frequency apparatus 15 2003
* 7035607 Systems and methods for providing an adjustable reference signal to RF circuitry 62 2003
* 2004/0077,327 Frequency modification circuitry for use in radio-frequency communication apparatus and associated methods 10 2003
* 6993307 Method and apparatus for operating a PLL with a phase detector/sample hold circuit for synthesizing high-frequency signals for wireless communications 5 2003
* 2004/0075,506 Method and apparatus for operating a PLL with a phase detector/sample hold circuit for synthesizing high-frequency signals for wireless communications 4 2003
7221921 Partitioning of radio-frequency apparatus 19 2003
7353011 Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications 4 2005
7200364 Frequency modification circuitry for use in radio-frequency communication apparatus and associated methods 10 2005
* 2006/0160,512 Frequency modification circuitry for use in radio-frequency communication apparatus and associated methods 3 2005
 
MEDTRONIC, INC. (1)
7162307 Channel occupancy in multi-channel medical device communication 15 2003
 
SKYWORKS SOLUTIONS, INC. (1)
7103127 System for controlling the frequency of an oscillator 4 2001
 
ROUND ROCK RESEARCH, LLC (61)
* 6115318 Clock vernier adjustment 91 1996
6912680 Memory system with dynamic timing correction 50 1997
* 5940608 Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal 133 1997
* 5920518 Synchronous clock generator including delay-locked loop 132 1997
6173432 Method and apparatus for generating a sequence of clock signals 98 1997
* 5953284 Method and apparatus for adaptively adjusting the timing of a clock signal used to latch digital signals, and memory device using same 93 1997
* 6011732 Synchronous clock generator including a compound delay-locked loop 229 1997
* 5940609 Synchronous clock generator including a false lock detector 121 1997
* 5926047 Synchronous clock generator including a delay-locked loop signal loss detector 71 1997
* 6101197 Method and apparatus for adjusting the timing of signals over fine and coarse ranges 144 1997
6269451 Method and apparatus for adjusting data timing by delaying clock signal 45 1998
* 6016282 Clock vernier adjustment 292 1998
6338127 Method and apparatus for resynchronizing a plurality of clock signals used to latch respective digital signals, and memory device using same 62 1998
6349399 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 18 1998
6279090 Method and apparatus for resynchronizing a plurality of clock signals used in latching respective digital signals applied to a packetized memory device 35 1998
* 6029250 Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same 405 1998
6430696 Method and apparatus for high speed data capture utilizing bit-to-bit timing correction, and memory device using same 175 1998
6374360 Method and apparatus for bit-to-bit timing correction of a high speed memory bus 37 1998
* 6026050 Method and apparatus for adaptively adjusting the timing of a clock signal used to latch digital signals, and memory device using same 201 1999
6201424 Synchronous clock generator including a delay-locked loop signal loss detector 27 1999
6340904 Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal 26 1999
* 6119242 Synchronous clock generator including a false lock detector 35 1999
6378079 Computer system having memory device with adjustable data clocking 81 2000
6327196 Synchronous memory device having an adjustable data clocking circuit 59 2000
6959016 Method and apparatus for adjusting the timing of signals over fine and coarse ranges 17 2000
6954097 Method and apparatus for generating a sequence of clock signals 9 2001
* 2001/0024,135 Method and apparatus for generating a sequence of clock signals 3 2001
6801989 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same 88 2001
6499111 Apparatus for adjusting delay of a clock signal relative to a data signal 46 2001
6477675 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 1 2001
6952462 Method and apparatus for generating a phase dependent control signal 27 2001
6662304 Method and apparatus for bit-to-bit timing correction of a high speed memory bus 140 2002
6643789 Computer system having memory device with adjustable data clocking using pass gates 17 2002
6931086 Method and apparatus for generating a phase dependent control signal 15 2002
7016451 Method and apparatus for generating a phase dependent control signal 4 2002
6647523 Method for generating expect data from a captured bit pattern, and memory device using same 13 2002
7168027 Dynamic synchronization of data capture on an optical or other high speed communications link 19 2003
7085975 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 5 2003
7159092 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same 14 2003
* 2004/0103,226 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with clock signal, and memory device and computer system using same 2 2003
7234070 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding 17 2003
* 2005/0091,464 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding 4 2003
7415404 Method and apparatus for generating a sequence of clock signals 4 2005
* 2005/0249,028 Method and apparatus for generating a sequence of clock signals 0 2005
7418071 Method and apparatus for generating a phase dependent control signal 9 2005
* 2005/0286,505 Method and apparatus for generating a phase dependent control signal 2 2005
7373575 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 1 2006
7461286 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding 7 2006
* 2006/0206,742 System and method for using a learning sequence to establish communications on a high- speed nonsynchronous interface in the absence of clock forwarding 0 2006
8181092 Dynamic synchronization of data capture on an optical or other high speed communications link 2 2006
* 2008/0301,533 Dynamic synchronization of data capture on an optical or other high speed communications link 10 2006
7889593 Method and apparatus for generating a sequence of clock signals 2 2007
7657813 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 1 2008
* 2008/0195,908 METHOD AND APPARATUS FOR GENERATING EXPECT DATA FROM A CAPTURED BIT PATTERN, AND MEMORY DEVICE USING SAME 6 2008
7602876 Method and apparatus for generating a phase dependent control signal 8 2008
* 2008/0279,323 METHOD AND APPARATUS FOR GENERATING A PHASE DEPENDENT CONTROL SIGNAL 2 2008
8107580 Method and apparatus for generating a phase dependent control signal 1 2009
7954031 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 2 2009
8565008 Method and apparatus for generating a sequence of clock signals 0 2011
8433023 Method and apparatus for generating a phase dependent control signal 0 2012
8892974 Dynamic synchronization of data capture on an optical or other high speed communications link 0 2012
 
STMICROELECTRONICS INTERNATIONAL N.V. (1)
6574288 Method and apparatus for adjusting a digital control word to tune synthesized high-frequency signals for wireless communications 22 1998
 
INTEL CORPORATION (1)
* 6882064 System to vary capacitance based on a control signal 4 2003
 
RENESAS ELECTRONICS CORPORATION (1)
* 5428309 Delay circuit 59 1993
 
MITSUBISHI DENKI KABUSHIKI KAISHA (1)
* 5107220 Frequency synthesizer 9 1991
 
MITSUBISHI RAYON CO., LTD. (1)
* 5012198 Digital PLL circuit having reduced lead-in time 13 1989
 
BROADCOM CORPORATION (1)
6650196 Multi-frequency band controlled oscillator 2 2001
 
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC. (7)
* 5946244 Delay-locked loop with binary-coupled capacitor 145 1997
6400641 Delay-locked loop with binary-coupled capacitor 3 1999
6262921 Delay-locked loop with binary-coupled capacitor 52 2000
6256259 Delay-locked loop with binary-coupled capacitor 0 2000
6483757 Delay-locked loop with binary-coupled capacitor 3 2001
6490224 Delay-locked loop with binary-coupled capacitor 9 2001
6490207 Delay-locked loop with binary-coupled capacitor 24 2001
* Cited By Examiner