Dual-slope waveform generation circuit
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United States of America Patent
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-
Jan 16, 1990
Grant Date -
N/A
app pub date -
Sep 16, 1988
filing date -
Dec 8, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A dual-slope waveform generation circuit without a DC path and with decreased layout area including a pull-up and pull-down resistor, a transmission gate and an inverter. An input signal IN is applied to the pull-up transistor, to each gates of MOS transistors M.sub.1, M.sub.2 composing of the inverter A, and to drains of MOS transistors M.sub.3, M.sub.4 composing of the transmission gate B. A common node in the inverter is connected to the gate of the N type MOS transistor in the transmission gate. The sources of the transistors M.sub.3, M.sub.4 are connected to the gate of the pull-down transistor. An output signal OUT is applied to the gate of the transistor M.sub.4 and the signal is fed back.
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