Variable clock delay circuit utilizing the R-C time constant
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United States of America Patent
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-
Jan 30, 1990
Grant Date -
N/A
app pub date -
Mar 17, 1988
filing date -
Mar 18, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A variable clock delay circuit utilizing the RC time constant in a semiconductor memory has the improved delay effect of the RC time constant. The variable clock delay circuit in which, in the delay occurring between the clocks having the large width of variation according to the variation of the power source voltage, the RC time constant node is separated and precharged so that the delay of the charging time can be prevented, and the residual delay can be removed by using the precharging system utilizing the boosted clock.
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